High Performance Computing 25 SP Heterogeneous Computing

总字数:1678字,预计阅读时间 02分 47秒。

Heterogeneous Computing is on the way!

GPU Computing Ecosystem

CUDA: NVIDIA's Architecture for GPU computing.

image-20250417195644624

Internal Buses

HyperTransport:

Primarily a low latency direct chip to chip interconnect, supports mapping to board to board interconnect such as PCIe.

PCI Expression

Switched and point-to-point connection.

NVLink

image-20250417200241703

OpenCAPI

Heterogeneous computing was in the professional world mostly limited to HPC, in the consumer world is a "nice to have".

But OpenCAPI is absorbed by CXL.

CPU-GPU Arrangement

image-20250424184701573

First Stage: Intel Northbrige

image-20250424185022360

Second Stage: Symmetric Multiprocessors:

image-20250424185048036

Third Stage: Nonuniform Memory Access

And the memory controller is integrated directly in the CPU.

image-20250424185152081

So in such context, the multiple CPUs is called NUMA:

image-20250424185219673

And so there can be multi GPUs:

image-20250424185322963

Fourth Stage: Integrated PCIe in CPU

image-20250424185354247

And there is such team integrated CPU, which integrated a GPU into the CPU chipset.

image-20250424185449577

And the integrated GPU can work with discrete GPUs:

image-20250424185541483

Final Stage: Multi GPU Board

image-20250424190159059

文章作者:Ricardo Ren
版权声明:本博客所有文章除特别声明外,均采用 CC BY-NC-SA 4.0 许可协议,诸位读者如有兴趣可任意转载,不必征询许可,但请注明“转载自 Ricardo's Blog ”。

2021 - 2025 © Ricardo Ren ,由 .NET 9.0.2 驱动。

Build Commit # 0f346d9ded

蜀ICP备2022004429号-1